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general description the MAX8702/max8703 dual-phase noninverting mosfet drivers are designed to work with pwm con- troller ics, such as the max8705/max8707, in note- book cpu core and other multiphase regulators. applications can either step down directly from the bat- tery voltage to create the core voltage, or step down from a low-voltage system supply. the single-stage con- version method allows the highest possible efficiency, while the 2-stage conversion at higher switching frequen- cy provides the minimum possible physical size. each mosfet driver is capable of driving 3nf capaci- tive loads with only 19ns propagation delay and 8ns typical rise and fall times. larger capacitive loads are allowable but result in longer propagation and transition times. adaptive dead-time control helps prevent shoot- through currents and maximizes converter efficiency. the MAX8702/max8703 feature zero-crossing com- parators on each channel. when enabled, these com- parators permit the drivers to be used in pulse-skipping operation, thereby saving power at light loads. a sepa- rate shutdown control is also included that disables all functions, drops quiescent current to 2?, and sets dh low and dl high. the MAX8702 integrates a resistor-programmable tem- perature sensor. an open-drain output ( drhot ) signals to the system when the local die temperature exceeds the set temperature. the MAX8702/max8703 are avail- able in a thermally-enhanced 20-pin thin qfn package. applications multiphase high-current power supplies 2- to 4-cell li+ battery to cpu core supplies notebook and desktop computers servers and workstations features dual-phase mosfet driver 0.35 ? (typ) on-resistance and 5a (typ) drive current drives large synchronous-rectifier mosfets integrated temperature sensor (MAX8702 only) resistor programmable open-drain driver hot indicator ( drhot ) adaptive dead time prevents shoot-through selectable pulse-skipping mode 4.5v to 28v input voltage range thermally enhanced low-profile thin qfn package MAX8702/max8703 dual-phase mosfet drivers with temperature sensor ________________________________________________________________ maxim integrated products 1 MAX8702 +5v tset agnd v out v in 4.5v to 28v bst1 dh1 lx1 dl1 pgnd1 v cc drhot v dd shdn +5v v out v in 4.5v to 28v +5v bst2 dh2 lx2 dl2 pgnd2 skip pwm1 pwm2 minimal operating circuit ordering information 19-3357; rev 0; 8/04 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin- package d esc r ipt io n MAX8702 etp -40? to +100? 20 thi n q fn 4m m x 4m m dual-phase driver with temp. sensor max8703 etp -40? to +100? 20 thi n q fn 4m m x 4m m dual-phase driver without temp. sensor pin configuration appears at end of data sheet.
MAX8702/max8703 dual-phase mosfet drivers with temperature sensor 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (circuit of figure 2. v cc = v dd = v shdn = v skip = 5v, t a = 0? to +85? . typical values are at t a = +25?, unless otherwise noted.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to agnd............................................................-0.3v to +6v v dd to agnd............................................................-0.3v to +6v pgnd_ to agnd ...................................................-0.3v to +0.3v skip , shdn , drhot , tset to agnd......................-0.3v to +6v pwm_ to agnd ........................................................-0.3v to +6v dl_ to pgnd_ ............................................-0.3v to (v dd + 0.3v) lx_ to agnd .............................................................-2v to +30v dh_ to lx_ ...............................................-0.3v to (v bst_ + 0.3v) bst_ to lx_ ..............................................................-0.3v to +6v continuous power dissipation (t a = +70?) 20-pin 4mm x 4mm thin qfn (derate 16.9mw/ c above +70?) .............................1349mw operating temperature range .........................-40? to +100? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units input voltage range v cc 4.5 5.5 v v cc rising 3.4 3.85 4.1 v cc undervoltage-lockout threshold v uvlo 85mv typical hysteresis v cc falling 3.3 3.75 4.0 v skip = agnd, pwm_ = agnd 200 400 a v cc quiescent current (note 1) i cc skip = agnd, pwm_ = v cc 23ma v dd quiescent current i dd skip = agnd, pwm_ = agnd 1 5 a v cc shutdown current shdn = skip = agnd 2 5 a v dd shutdown current shdn = skip = agnd 1 5 a gate drivers and dead-time control (figure 1) t pwm-dl pwm_ high to dl_ low 19 dl_ propagation delay t dh-dl dh_ low to dl_ high 36 ns t dl-dh dl_ low to dh_ high 25 dh_ propagation delay t pwm-dh pwm_ low to dh_ low 23 ns t f _ dl dl_ falling, 3nf load 11 dl_ transition time t r _ dl dl_ rising, 3nf load 8 ns t f _ dh dh_ falling, 3nf load 14 dh_ transition time t r _ dh dh_ rising, 3nf load 16 ns dh_ on-resistance (note 2) r dh v bst _ - v lx _ = 5v 1.0 4.5 ? ? dh_ source/sink current i dh v dh _ = 2.5v, v bst _ - v lx _ = 5v 1.5 a dl_ source current i dl _ source v dl _ = 2.5v 1.5 a dl_ sink current i dl _ sink v dl _ = 5v 5 a zero-crossing threshold v pgnd _ - v lx _, skip = agnd 2.5 mv temperature sensor temperature threshold accuracy t a = +85 c to +125 c, 10 c falling hysteresis -5 +5 c drhot output low voltage i sink = 3ma 0.4 v drhot leakage current high state, v drhot = 5.5v 1 a
MAX8702/max8703 dual-phase mosfet drivers with temperature sensor _______________________________________________________________________________________ 3 note 1: static drivers instead of pulsed-level translators. note 2: production testing limitations due to package handling require relaxed maximum on-resistance specifications for the thin qfn package. note 3: specifications from -40 c to +100 c are guaranteed by design, not production tested. parameter symbol conditions min typ max units thermal-shutdown threshold 10 c hysteresis +160 c logic control signals logic input high voltage shdn , skip , pwm1, pwm2 2.4 v logic input low voltage shdn , skip , pwm1, pwm2 0.8 v logic input current shdn , skip , pwm1, pwm2 -1 +1 a electrical characteristics (continued) (circuit of figure 2. v cc = v dd = v shdn = v skip = 5v, t a = 0 c to +85 c . typical values are at t a = +25 c, unless otherwise noted.) parameter symbol conditions min typ max units input voltage range v cc 4.5 5.5 v v cc rising 3.4 4.1 v cc undervoltage-lockout threshold v uvlo 85mv typical hysteresis v cc falling 3.3 4.0 v skip = agnd, pwm_ = pgnd_ 450 a v cc quiescent current i cc skip = agnd, pwm_ = v cc 3ma v dd quiescent current i dd skip = agnd, pwm_ = pgnd_, t a = -40 c to +85 c 5a v cc shutdown current shdn = skip = agnd, t a = -40 c to +85 c 5a v dd shutdown current shdn = skip = agnd, t a = -40 c to +85 c 5a gate drivers and dead-time control dh_ on-resistance (note 2) r dh v bst _ - v lx _ = 5v 1.0 4.5 ? ? temperature sensor drhot output low voltage i sink = 3ma 0.4 v logic control signals logic input high voltage shdn , skip , pwm1, pwm2 2.4 v logic input low voltage shdn , skip , pwm1, pwm2 0.8 v electrical characteristics (circuit of figure 2. v cc = v dd = v shdn = v skip = 5v, t a = -40 c to +100 c , unless otherwise noted.) (note 3)
0 100 50 200 150 300 250 350 0 0.4 0.6 0.2 0.8 1.0 1.2 power dissipation vs. frequency (single phase, both drivers switching) MAX8702/03 toc01 frequency (mhz) power dissipation (mw) c dl = 6nf, c dh = 3nf c dl = 3nf, c dh = 3nf c dl = 3nf, c dh = 1.5nf v cc = 5.5v 400 300 200 100 0 13 2 456 power dissipation vs. capacitive load (single phase, both drivers switching) MAX8702/03 toc02 capacitance (nf) power dissipation (mw) freq = 1.2mhz freq = 0.6mhz freq = 0.3mhz v cc = 5.5v, c dh = c dl 20 15 10 5 0 13 2 456 dl rise/fall time vs. capacitive load MAX8702/03 toc03 capacitance (nf) rise/fall time (ns) dl rise dl fall 0 10 5 20 15 25 30 13 2456 dh rise/fall time vs. capacitive load MAX8702/03 toc04 capacitance (nf) rise/fall time (ns) dh rise dh fall MAX8702/max8703 dual-phase mosfet drivers with temperature sensor 4 _______________________________________________________________________________________ pwm_ dl_ dh_ 10% t r_dh 90% 10% 90% t f_dl t pwm-dl 10% 90% t f_dh 10% t r_dl 90% t dl-dh t dh-dl t pwm-dh figure 1. timing definitions used in the electrical characteristics typical operating characteristics (circuit of figure 2. v in = 12v, v dd = v cc = v shdn = v skip = 5v, t a = +25 c unless otherwise noted.)
MAX8702/max8703 dual-phase mosfet drivers with temperature sensor _______________________________________________________________________________________ 5 dh/dl rise/fall times vs. temperature MAX8702 toc05 temperature ( c) rise/fall time (ns) 100 80 60 40 20 5 10 15 20 0 0 120 dh rise dh fall dl rise dl fall c dh = c dl = 3nf propagation delay vs. temperature MAX8702 toc06 temperature ( c) propagation delay (ns) 120 90 60 30 10 20 30 40 50 0 0 150 dl fall to dh rise pwm fall to dh fall pwm rise to dl fall c dh = c dl = 3nf r tset vs. temperature MAX8702 toc07 temperature ( c) r tset (k ? ) 130 110 90 70 10 20 30 40 50 60 70 0 50 150 typical switching waveforms MAX8702 toc08 125ns/div 5v 0 5v 0 10v 0 0 a b c d a. pwm, 5v/div b. dl, 5v/div c. dh, 10v/div d. lx, 10v/div dh rise and dl fall waveforms MAX8702 toc09 20ns/div 5v 0 5v 0 10v 0 0 a b c d a. pwm, 5v/div b. dl, 5v/div c. dh, 10v/div d. lx, 10v/div dh fall and dl rise waveforms MAX8702 toc10 20ns/div 5v 0 5v 0 10v 0 0 a b c d a. pwm, 5v/div b. dl, 5v/div c. dh, 10v/div d. lx, 10v/div typical operating characteristics (continued) (circuit of figure 2. v in = 12v, v dd = v cc = v shdn = v skip = 5v, t a = +25 c unless otherwise noted.)
MAX8702/max8703 dual-phase mosfet drivers with temperature sensor 6 _______________________________________________________________________________________ pin description pin MAX8702 max8703 name function 1 1 pwm1 phase 1 pwm logic input. dh1 is high when pwm1 is high; dl1 is high when pwm1 is low. 2 2 pwm2 phase 2 pwm logic input. dh2 is high when pwm2 is high; dl2 is high when pwm2 is low. 3 3 agnd analog ground. the agnd and pgnd_ pins must be connected externally at one point close to the ic. connect the device s exposed backside pad to agnd. 4 tset temperature-set input. connect an external 1% resistor from tset to agnd to set the trip point. r tset = 85,210 / t - 745,200 / t 2 - 195, where r tset is the temperature-setting resistor in k ? and t is the trip temperature in kelvin. 5 drhot driver-hot-indicator output. drhot is an open-drain output. pull up with an external resistor. when the device s temperature exceeds the programmed set point, drhot is pulled low. 6 i.c. internally connected. connect to agnd. 7 7 v cc internal control circuitry supply input. the input voltage range is from 4.5v to 5.5v. bypass v cc to agnd with a 1f ceramic capacitor. the maximum resistance between v cc and v dd should be 10 ? . 8 8 bst2 phase 2 bootstrap flying-capacitor connection. an optional resistor in series with bst2 allows the dh2 pullup current to be adjusted. 9 9 dh2 phase 2 high-side gate-driver output. dh2 swings between lx2 and bst2. 10 10 lx2 phase 2 inductor switching node connection. lx2 is the internal lower supply rail for the dh2 high-side gate driver. lx2 is also the input to the skip-mode zero-crossing comparator. 11 11 pgnd2 phase 2 power ground. pgnd2 is the internal lower supply rail for the dl2 low-side gate driver. 12 12 dl2 phase 2 low-side gate-driver output. dl2 swings between pgnd2 and v dd . dl2 is high in shutdown. 13 13 v dd dl_ gate-driver supply input. the input voltage range is from 4.5v to 5.5v. bypass v dd to the power ground with a 2.2f ceramic capacitor. 14 14 dl1 phase 1 low-side gate-driver output. dl1 swings between pgnd1 and v dd . dl1 is high in shutdown. 15 15 pgnd1 phase 1 power ground. pgnd1 is the internal lower supply rail for the dl1 low-side gate driver. 16 16 lx1 phase 1 inductor switching node connection. lx1 is the internal lower supply rail for the dh1 high-side gate driver. lx1 is also the input to the skip-mode zero-crossing comparator. 17 17 dh1 phase 1 high-side gate-driver output. dh1 swings between lx1 and bst1. 18 18 bst1 phase 1 bootstrap flying-capacitor connection. an optional resistor in series with bst1 allows the dh1 pullup current to be adjusted. 19 19 skip pulse-skipping-mode control input. the pulse-skipping mode is enabled when skip is low. when skip is high, both drivers operate in pwm mode (i.e., except during dead times, dl_ is the complement of dh_). 20 20 shdn s hutd ow n c ontr ol inp ut. w hen s hd n and s kip ar e l ow , d h _ i s for ced l ow , d l_ for ced hi g h, and the d evi ce enter s i nto a l ow - p ow er shutd ow n state. tem p er atur e sensi ng i s d i sab l ed i n shutd ow n. 4, 5, 6 n. c. no connection. not internally connected.
MAX8702/max8703 dual-phase mosfet drivers with temperature sensor _______________________________________________________________________________________ 7 typical operating circuit the typical operating circuit of the MAX8702 ( figure 2) shows the power-stage and gate-driver circuitry of a dual- phase cpu core supply operating at 300khz, with each phase capable of supplying 20a of load current. table 1 lists recommended component options, and table 2 lists the component suppliers contact information. detailed description the MAX8702/max8703 dual-phase noninverting mosfet drivers are intended to work with pwm con- troller ics in cpu core and other multiphase switching regulators. each mosfet driver is capable of driving 3nf capacitive loads with only 19ns propagation delay and 8ns typical rise and fall times. larger capacitive loads are allowable but result in longer propagation and transition times. adaptive dead-time control pre- vents shoot-through currents and maximizes converter nh1 MAX8702 nl1 2.2 f 0.22 f 0.22 f 1 f 10 ? +5v r tset d bst1 tset agnd d1 l1 v out v out v in 7v to 20v v in 7v to 20v bst1 dh1 lx1 dl1 pgnd1 v cc drhot c out1 c in1 v dd nh2 shdn +5v nl2 d2 l2 bst2 dh2 lx2 from controller ic dl2 pgnd2 c out2 c in2 d bst2 100k ? +5v drskp skip pwm1 pwm1 pwm2 pwm2 figure 2. MAX8702 typical operating circuit designation description total input capacitance (c in ) (4) 10f, 25v taiyo yuden tmk432bj106km or tdk c4532x5r1e106m total output capacitance (c out ) (4) 330f, 2.5v, 9m ? low-esr polymer capacitor (d case) sanyo 2r5tpe330m9 schottky diode (per phase) 3a schottky diode central semiconductor cmsh3-40 inductor (per phase) 0.6h panasonic etqp1h0r6bfa or sumida cdep134h-0r6 high-side mosfet (nh, per phase) siliconix (1) si7892dp or international rectifier (2) irf6604 low-side mosfet (nl, per phase) siliconix (2) si7442dp or international rectifier (2) irf6603 table 1. component list supplier website central semiconductor www.centralsemi.com fairchild semiconductor www.fairchildsemi.com international rectifier www.irf.com panasonic www.panasonic.com sanyo www.secc.co.jp siliconix (vishay) www.vishay.com sumida www.sumida.com taiyo yuden www.t-yuden.com tdk www.component.tdk.com table 2. component suppliers dh_ bst_ lx_ dl_ v dd pgnd_ v cc tset* drhot* pwm_ zx skip agnd shdn control and adaptive dead-time circuit temp sensor + tsdn lx_ pgnd_ pwm block (x2) *MAX8702 only MAX8702 max8703 uvlo figure 3. MAX8702 functional diagram
MAX8702/max8703 dual-phase mosfet drivers with temperature sensor 8 _______________________________________________________________________________________ efficiency while allowing operation with a variety of mosfets and pwm controllers. a uvlo circuit allows proper power-on sequencing. the pwm control inputs are both ttl and cmos compatible. the MAX8702 integrates a resistor-programmable tem- perature sensor. an open-drain output ( drhot ) signals to the system when the die temperature of the driver exceeds the set temperature. see the temperature sensor section. mosfet gate drivers (dh, dl) the dh and dl drivers are optimized for driving mod- erately sized high-side and larger low-side power mosfets. this is consistent with the low duty factor seen in the notebook cpu environment, where a large v in - v out differential exists. two adaptive dead-time circuits monitor the dh and dl outputs and prevent the opposite-side fet from turning on until dh or dl is fully off. there must be a low-resistance, low-inductance path from the dh and dl drivers to the mosfet gates for the adaptive dead-time circuits to work properly. otherwise, the sense circuitry interprets the mosfet gate as off while there is actually still charge left on the gate. use very short, wide traces measuring 10 to 20 squares (50 to 100 mils wide if the mosfet is 1in from the device). the internal pulldown transistor that drives dl low is robust, with a 0.35 ? (typ) on-resistance. this helps pre- vent dl from being pulled up due to capacitive coupling from the drain-to-gate capacitance of the low-side syn- chronous-rectifier mosfets when lx switches from ground to v in . applications with high input voltages and long, inductive dl traces may require additional gate-to- source capacitance to ensure fast-rising lx edges do not pull up the low-side mosfet s gate voltage, caus- ing shoot-through currents. the capacitive coupling between lx and dl created by the mosfet s gate-to- drain capacitance (c rss ), gate-to-source capacitance (c iss - c rss ), and additional board parasitics should not exceed the minimum threshold voltage: lot-to-lot variation of the threshold voltage can cause problems in marginal designs. typically, adding a 4700pf capacitor between dl and power ground, close to the low-side mosfets, greatly reduces cou- pling. to prevent excessive turn-off delays, do not exceed 22nf of total gate capacitance. alternatively, shoot-through currents may be caused by a combination of fast high-side mosfets and slow low- side mosfets. if the turn-off delay time of the low-side mosfets is too long, the high-side mosfets can turn on before the low-side mosfets have actually turned off. adding a resistor of less than 5 ? in series with bst slows down the high-side mosfet turn-on time, elimi- nating the shoot-through currents without degrading the turn-off time (r bst in figure 4). slowing down the high-side mosfets also reduces the lx node rise time, thereby reducing the emi and high-frequency coupling responsible for switching noise. boost capacitor selection the MAX8702/max8703 use a bootstrap circuit to gen- erate the floating supply voltages for the high-side dri- vers (dh). the boost capacitors (c bst ) selected must be large enough to handle the gate-charging require- ments of the high-side mosfets. typically, 0.1f ceramic capacitors work well for low-power applica- tions driving medium-sized mosfets. however, high- current applications driving large, high-side mosfets require boost capacitors larger than 0.1f. for these applications, select the boost capacitors to avoid dis- charging the capacitor more than 200mv while charg- ing the high-side mosfet s gates: where n is the number of high-side mosfets used for one phase and q gate is the total gate charge speci- fied in the mosfet s data sheet. for example, assume c nxq mv bst gate = 200 vv c c gs th in rss iss () < ? ? ? ? ? ? MAX8702 max8703 v dd bst dh lx (r bst )* d bst c bst c vdd input (v in ) n h l ( )* optional?he resistor reduces the switching-node rise time. figure 4. high-side gate-driver boost circuitry
MAX8702/max8703 dual-phase mosfet drivers with temperature sensor _______________________________________________________________________________________ 9 (2) irf7811w n-channel mosfets are used on the high side. according to the manufacturer s data sheet, a single irf7811w has a maximum gate charge of 24nc (v gs = 5v). using the above equation, the required boost capacitance is: selecting the closest standard value, this example requires a 0.22f ceramic capacitor. 5v bias supply (v cc and v dd ) v dd provides the supply voltages for the low-side dri- vers (dl). the decoupling capacitor at v dd also charges the bst capacitors during the time period when dl is high. therefore, the v dd capacitor should be large enough to minimize the ripple voltage during switching transitions. c vdd should be chosen accord- ing to the following equation: c vdd = 10 x c bst in the example above, a 0.22f capacitor is used for c bst , so the v dd capacitor should be 2.2f. v cc provides the supply voltage for the internal logic circuit and temperature sensor. to avoid switching noise from coupling into the sensitive internal circuit, an rc filter is recommended for the v cc pin. place a 10 ? resistor from the supply voltage to the v cc pin and a 1f capacitor from the v cc pin to agnd. the total bias current i bias from the 5v supply can be calculated using the following equation: i bias = i dd + i cc i dd = n phase x f sw x (n nh x q g(nh) + n nl x q g(nl) ) where n phase is the number of phases, f sw is the switching frequency, q g(nh) and q g(nl) are the mosfet data sheet s total gate-charge specification limits at v gs = 5v, n nh is the total number of high-side mosfets in parallel, n nl is the total number of low- side mosfets in parallel, and i cc is the v cc supply current. undervoltage lockout (uvlo) when v cc is below the uvlo threshold (3.85v typ) and shdn and skip are low, dl is kept high and dh is held low. this provides output overvoltage protection as soon as the supply voltage is applied. once v cc is above the uvlo threshold and shdn is high, dl and dh levels depend on the pwm signal applied. if v cc falls below the uvlo threshold while shdn is high, both dl and dh are immediately forced low. this pre- vents negative undershoots on the output when the system power is removed without going through the proper shutdown sequence. low-power pulse skipping the MAX8702/max8703 enter into low-power pulse- skipping mode when skip is pulled low. in skip mode, an inherent automatic switchover to pulse frequency modulation (pfm) takes place at light loads. a zero- crossing comparator truncates the low-side switch on- time at the inductor current s zero-crossing. the comparator senses the voltage across lx and pgnd. once v lx - v pgnd drops below the zero-crossing com- parator threshold (see the electrical characteristics ), the comparator forces dl low. this mechanism causes the threshold between pulse-skipping pfm and non- skipping pwm operation to coincide with the boundary between continuous and discontinuous inductor-cur- rent operation. the pfm/pwm crossover occurs when the load current of each phase is equal to 1/2 the peak- to-peak ripple current, which is a function of the induc- tor value. for a battery input range of 7v to 20v, this threshold is relatively constant, with only a minor dependence on the input voltage due to the typically low duty cycles. the switching waveforms may appear noisy and asynchronous when light loading activates the pulse-skipping operation, but this is a normal oper- ating condition that results in high light-load efficiency. shutdown the MAX8702/max8703 feature a low-power shutdown mode that reduces the v cc quiescent current drawn to 2a (typ). driving shdn and skip low sets dh low and dl high. temperature sensing is disabled in shutdown. temperature sensor (MAX8702 only) the MAX8702 includes a fully integrated resistor-pro- grammable temperature sensor. the sensor incorpo- rates two temperature-dependent reference signals and one comparator. one signal exhibits a characteris- tic that is proportional to temperature, and the other is complementary to temperature. the temperature at which the two signals are equal determines the thermal trip point. when the temperature of the device exceeds the trip point, the open-drain output drhot pulls low. c xnc mv f bst == 224 200 024 . shdn skip mode of operation ll low-power shutdown state; temperature sensing disabled l h pwm operation h l pulse-skipping operation h h pwm operation table 3. modes of operation
MAX8702/max8703 dual-phase mosfet drivers with temperature sensor 10 ______________________________________________________________________________________ a 10 c hysteresis keeps the output from oscillating when the temperature is close to the threshold. the thermal trip point is programmable up to +160 c through an external resistor between tset and agnd. use the following equation to determine the value of the resistor: r tset = (85,210 / t) (745,200 / t 2 ) 195 where r tset is the value of the set-point resistor in k ? and t is the trip-point temperature in kelvin. the MAX8702 and max8703 include a thermal-shut- down circuit that is independent of the temperature sensor. the thermal shutdown has a fixed threshold of +160 c (typ) with 10 c of thermal hysteresis. when the die temperature exceeds +160 c, dh is pulled low and dl is pulled high. the driver automatically resets when the die temperature drops by +10 c. applications information power mosfet selection most of the following mosfet guidelines focus on the challenge of obtaining high load-current capability when using high-voltage (>20v) ac adapters. low-cur- rent applications usually require less attention. the high-side mosfet (n h ) must be able to dissipate the resistive losses plus the switching losses at both v in(min) and v in(max) . calculate both of these sums. ideally, the losses at v in(min) should be roughly equal to losses at v in(max) , with lower losses in between. if the losses at v in(min) are significantly higher than the losses at v in(max) , consider increasing the size of n h (reducing r ds(on) but increasing c gate ). conversely, if the losses at v in(max) are significantly higher than the losses at v in(min) , consider reducing the size of n h (increasing r ds(on) but reducing c gate ). if v in does not vary over a wide range, the minimum power dissi- pation occurs where the resistive losses equal the switching losses. choose a low-side mosfet that has the lowest possi- ble on-resistance (r ds(on) ), comes in a moderate- sized package (i.e., one or two so-8s, dpak, or d 2 pak), and is reasonably priced. ensure that the dl gate driver can supply sufficient current to support the gate charge and the current injected into the parasitic gate-to-drain capacitor caused by the high-side mos- fet turning on; otherwise, cross-conduction problems can occur. mosfet power dissipation worst-case conduction losses occur at the duty factor extremes. for the high-side mosfet (n h ), the worst- case power dissipation due to resistance occurs at the minimum input voltage: where n total is the total number of phases. generally, a small high-side mosfet is desired to reduce switching losses at high input voltages. however, the r ds(on) required to stay within package power dissipation often limits how small the mosfets can be. again, the optimum occurs when the switching losses equal the conduction (r ds(on) ) losses. high- side switching losses do not usually become an issue until the input is greater than approximately 15v. calculating the power dissipation in high-side mosfets (n h ) due to switching losses is difficult since it must allow for difficult quantifying factors that influ- ence the turn-on and turn-off times. these factors include the internal gate resistance, gate charge, threshold voltage, source inductance, and pc board layout characteristics. the following switching-loss cal- culation provides only a very rough estimate and is no substitute for breadboard evaluation, preferably includ- ing verification using a thermocouple mounted on n h : where c rss is the reverse transfer capacitance of n h and i gate is the peak gate-drive source/sink current (5a typ). switching losses in the high-side mosfet can become an insidious heat problem when maximum ac adapter voltages are applied, due to the squared term in the c v in 2 f sw switching-loss equation. if the high-side mosfet chosen for adequate r ds(on) at low battery voltages becomes extraordinarily hot when biased from v in(max) , consider choosing another mosfet with lower parasitic capacitance. for the low-side mosfet (n l ), the worst-case power dissipation always occurs at the maximum input voltage: the worst case for mosfet power dissipation occurs under heavy overloads that are greater than i load(max) but are not quite high enough to exceed pd n resistive v v i n r l out in max load total ds on () () () =? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 1 2 pd n switching v cf i i n h in max rss sw gate load total () () = () ? ? ? ? ? ? ? ? ? ? ? ? 2 pd n resistive v v i n r h out in load total ds on () () = ? ? ? ? ? ? ? ? ? ? ? ? 2
MAX8702/max8703 dual-phase mosfet drivers with temperature sensor ______________________________________________________________________________________ 11 the current limit and cause the fault latch to trip. the mosfets must have a good-sized heatsink to handle the overload power dissipation. the heat sink can be a large copper field on the pc board or an externally mounted device. the schottky diode only conducts during the dead time when both the high-side and low-side mosfets are off. choose a schottky diode with a forward voltage low enough to prevent the low-side mosfet body diode from turning on during the dead time, and a peak cur- rent rating higher than the peak inductor current. the schottky diode must be rated to handle the average power dissipation per switching cycle. this diode is optional and can be removed if efficiency is not critical. ic power dissipation and thermal considerations power dissipation in the ic package comes mainly from driving the mosfets. therefore, it is a function of both switching frequency and the total gate charge of the selected mosfets. the total power dissipation when both drivers are switching is given by: pd(ic) = i bias x 5v where i bias is the bias current of the 5v supply calcu- lated in the 5v bias supply (v dd and v cc ) section . the rise in die temperature due to self-heating is given by the following formula: ? t j = pd(ic) x ja where pd(ic) is the power dissipated by the device, and ja is the package s thermal resistance. the typical ther- mal resistance is 59.3 c/w for the 4mm x 4mm thin qfn package. for example, if the MAX8702 dissipates 500mw of power within the ic, this corresponds to a 30 c shift in the die temperature in the thin qfn package. pc board layout considerations the MAX8702/max8703 mosfet drivers source and sink large currents to drive mosfets at high switching speeds. the high di/dt can cause unacceptable ringing if the trace lengths and impedances are not well con- trolled. the following pc board layout guidelines are recommended when designing with the device: 1) place v cc and v dd decoupling capacitors as close to their respective pins as possible. 2) minimize the high-current loops from the input capaci- tor, upper-switching mosfet, and low-side mosfet back to the input capacitor negative terminal. 3) provide enough copper area at and around the switching mosfets and inductors to aid in thermal dissipation. 4) connect the pgnd1 and pgnd2 pins as close as possible to the source of the low-side mosfets. 5) keep lx traces away from sensitive analog compo- nents and nodes. place the ic and analog compo- nents on the opposite side of the board from the power-switching node if possible. 6) use two or more vias for dl and dh traces when changing layers to reduce via inductance. figure 5 shows a pc board layout example. power ground output connect agnd and pgnd_ beneath the controller at one point only as shown via to power ground c in c in inductor input use double vias for dl_ c in inductor c in c out c out c out c out figure 5. pc board layout example
MAX8702/max8703 dual-phase mosfet drivers with temperature sensor 12 ______________________________________________________________________________________ 20 19 18 17 12 13 14 15 dl2 v dd dl1 pgnd1 4 3 2 1 tset* agnd pwm2 pwm1 11 pgnd2 *these pins are n.c. on the max8703 5 drhot* MAX8702 max8703 shdn skip bst1 dh1 i.c.* v cc bst2 dh2 16 6 7 8 9 10 lx1 lx2 thin qfn (4mm x 4mm) top view pin configuration chip information transistor count: 1100 process: bicmos
MAX8702/max8703 dual-phase mosfet drivers with temperature sensor ______________________________________________________________________________________ 13 package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 24l qfn thin.eps c 1 2 21-0139 package outline 12, 16, 20, 24l thin qfn, 4x4x0.8mm
MAX8702/max8703 dual-phase mosfet drivers with temperature sensor maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 14 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2004 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) c 2 2 21-0139 package outline 12, 16, 20, 24l thin qfn, 4x4x0.8mm

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